Originally posted on the AVS Forum March 15, 2003
So after countless hours and help from people around the globe… we finally *may* have the POOR MAN’S SDI EAV/SAV embedder all-in-one board.
Here are the two prototypes…

I’m going to be contacting local people to test the SDI output and see if it actually works! The CLC021 chip outputs nice clean signals on it’s timing outpin pins, HSYNC, VSYNC, FIELD… these signals are basically the EAV/SAV codes that we added and couldn’t figure out until Dan came along and help rewrite/optimized the VERILOG code.
I’d like to personally thank Roberto, Dan and Gray for all their time and expertise on making this project fun and exciting… I learned a ton from this!
Anyways… you’ll hear from one of us soon if it works or not… I sent Roberto a kit to test out on his SDI input.

UPDATES

Can you explain what you mean about the timing differences for each device? I seem to be getting perfect sync timings on my CLC021 (HSYNC and VSYNC) from the FPGA… they look exactly like the input timing signals (HSYNC/VSYNC from my DV-F07)… does this mean I still may have problems with timing? We followed the BT.601 and 656 spec.
I’m waiting for a local fella to get his HD Leeza so I can run my DVD changer over to test. I’m hoping our version of code is universal… it also does PAL.
Here are the latest photo of the boards installed:

It works!! Here is an amazing SDI capture!! WOW! (click for actual size)